As is well known by those skilled in the art, large electric fields occur near the drain when a MOS transistor is operating in a saturated condition, thereby creating hot-carriers. These hot-carriers cause unacceptable performance degradation in MOS devices built with conventional drain structures when channel lengths are short. To remedy this problem, alternative drain structures such as lightly doped drain (LDD) structures have been developed. Lightly doped drains absorb some of the potential energy into the drain and thus reduce the electric field intensity.
In a typical LDD structure, the drain is formed by two implants as illustrated in prior art FIGS. 1a and 1b. One implant, as illustrated in FIG. 1a, forms LDD regions 12 and 14 which are self-aligned to the gate electrode 16. A second implant, as illustrated in FIG. 1b, forms the source/drain regions 18 and 20 which are self-aligned to the gate electrode 16 on which two oxide sidewall spacers 22 are formed. The purpose of the first implant (a lightly doped implant) is to form a lightly doped section of the drain at the edge near the channel 24. The intensity of the electric field is reduced by about thirty to forty percent using this structure because the voltage drop is shared by the drain and the channel. In a typical non-LDD drain structure, almost the entire voltage drop occurs across the lightly doped channel region of the drain. A heavier dose is removed from the channel in an LDD structure than in a conventional transistor structure; therefore the heavily doped region of the drain can be deeper without impacting device operation. The increased junction depth lowers the sheet resistance and the contact resistance of the drain.
It is always desirable to increase the speed of transistors. One factor that limits a transistor's speed is the Miller capacitance, one major component of which is the drain-gate overlap capacitance. Consequently, if it would be desirable to minimize or even to eliminate a gate-to-drain overlap capacitance of a structure, a speed of the transistor speed can be increased.